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Intel puts two chips in a single package more efficiently

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Intel said it has figured out how to efficiently put two chips in a single package, which lowers costs and improves a computer’s overall performance.

Mark Bohr, an Intel fellow, said at a press event in San Francisco that “heterogeneous integration” will be a bigger part of the future for the world’s biggest chip maker.

That means Intel will have two silicon chips, each known as a “die,” in a single package, which includes all of the electrical connections to the rest of a computer system. In the past, a standard multi-chip package had the problem of having too much wiring to connect all of the connections in the die to the package. It was also inefficient at connecting one die to another die.

Above: Intel’s solution for connecting two chips in a single package.

Image Credit: Dean Takahashi

One solution in the past was to use a “silicon interposer,” Bohr said. That meant you could use a third chip underneath the two main chips. The purpose of the chip was to connect the devices more easily, but that had a higher cost.

With Intel’s solution — an embedded multi-die interconnect bridge — the company has figured out how to do this more efficiently, with low-cost and better connections between the chips and from the chips to the packages.

Intel is preparing to launch a 10-nanometer manufacturing process for its newest chips coming this year. The company believes that it has the most advanced chip manufacturing in the world and that it is a generation ahead of its rivals.

A nanometer is a billionth of a meter, and it only takes four silicon atoms in a crystal lattice to make one nanometer. In a 10-nm process, the circuits are only 10 nm apart. Bohr said that packaging two chips in one package is going to be a part of how Intel can keep driving technological progress forward.

Above: Three options for packaging two chips in one package. Intel favors the bottom solution.

Image Credit: Dean Takahashi

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